Minimum power design of RF front ends

This thesis describes an investigation into the design of RF front ends with minimum power dissipation. The central question is: "What are the fundamental limits for the power dissipation of telecommunication front ends, and what design procedures can be followed that approach these limits and, at the same time, result in practical circuits?" After a discussion of the state of the art in this area, the elementary operations of a front end are identified. For each of these elementary operations, the fundamental limits for the power dissipation are discussed, divided into technology imposed limits and physics imposed limits. A traditional DECT front end design is used to demonstrate the large difference between the fundamental limits and the power dissipation of existing circuits. To improve this situation, first the optimum distribution of specifications across individual subcircuits needs to be determined, such that the requirements for a specific system can be fulfilled. This is achieved through the introduction of formal transforms of the specifications of subcircuits, which correspond with transforms of the subcircuit itself. Using these transforms, the optimum distribution of gain, noise, linearity and power dissipation can be determined. As it turns out, this optimum distribution can even be represented by a simple, analytical expression. This expression predicts that the power dissipation of the DECT front end can be reduced by a factor of 2.7 through an optimum distribution of the specifications. Using these optimum specifications of the subcircuits, the boundaries for further power dissipation reduction can be determined. This is investigated at the system, circuit and technology level. These insights are used in the design of a 2.5GHz wireless local area network, implemented in an optimized technology ("Silicon on Anything"). The power dissipation of the complete receiver is 3.5mW, more than an order of magnitude below other wireless LAN receivers in recent publications. Finally, the combination of this minimum power design method with a platform based development strategy is discussed

Optimizing RF front ends for low power

This paper discusses optimizations for the power dissipation of RF front ends in portable wireless devices. A breakthrough in power dissipation can be achieved by simultaneously optimizing the antenna interface, circuits, and IC technology of such devices. A model that predicts the minimum power dissipation of a front end for both short-range and long-range connections will be introduced. Using these models, the impact of the antenna interface on the power dissipation will be assessed. Using two antennas with equal gain combining, a typical power dissipation reduction of 2.5 to 30 times can be achieved. Using high-impedance circuits for short-range systems in combination with silicon-on-anything technology, a further reduction of power dissipation by up to one order of magnitude can be realize

Design considerations for RF power amplifiers demonstrated through a GSM/EDGE power amplifier module

This paper describes the design considerations for RF power amplifiers in general, including trends in systems, linearity and efficiency, the PA environment, implementation is sues and technology. As an example a triple-band (900/1800/1900MHz) dual mode (GSMIEdge) power amplifier module is described in this article. The RF transistors and biasing circuitry are implemented in silicon bipolar technology. A multi-layer LTCC substrate is used as carrier

Substrate transfer for RF technologies

The constant pressure on performance improvement in RF processes is aimed at higher frequencies, less power consumption, and a higher integration level of high quality passives with digital active devices. Although excellent for the fabrication of active devices, it is the silicon substrate as a carrier that is blocking breakthroughs. Since all devices on a silicon wafer have a capacitive coupling to the resistive substrate, this results in a dissipation of RF energy, poor quality passives, cross-talk, and injection of thermal noise. We have developed a low-cost wafer-scale post-processing technology for transferring circuits, fabricated with standard IC processing, to an alternative substrate, e.g., glass. This technique comprises the gluing of a fully processed wafer, top down, to an alternative carrier followed by either partial or complete removal of the original silicon substrate. This effectively removes the drawbacks of silicon as a circuit carrier and enables the integration of high-quality passive components and eliminates cross-talk between circuit parts. A considerable development effort has brought this technology to a production-ready level of maturity. Batch-to-batch production equipment is now available and the technology and know-how are being licensed. In this paper, we present four examples to demonstrate the versatility of substrate transfer for RF applications

Nonlinear interference suppressor for varying-envelope local interference in multimode transceivers

In multimode transceivers, a local transmitter may induce a large interference in a local receiver, often several orders of magnitude stronger than the desired received signal. To suppress this interference by linear filtering, the receiver would need a very large dynamic range, resulting in excessive power consumption. A potentially much more power-efficient approach uses an adaptive memoryless nonlinearity that can strongly suppress the interference when adapted proportional to the envelope of the received interference. This approach has so far been limited to constant-envelope interferences owing to the difficulty of extracting accurate interference envelope information from the received signal. In this paper, we observe that in multimode transceivers the locally available baseband interference enables accurate adaptation for varying-envelope interferences. We identify and analyze nonlinear distortion products which are negligible for constant-envelope interferences. We show that adequate interference suppression can be achieved along with a negligible distortion to the desired signal

Analytical models for the wake-up receiver power budget for wireless sensor networks

In this paper analytical models of the energy consumption are presented which uses a real world radio model with two different low power modes. This model is used to compare energy consumption of different MAC protocols. The MAC protocols used for the comparison are chosen with sensor networks is mind. The energy consumption of the nodes in a sensor network needs to be minimized to maximize the lifetime of the network. Emphasis is placed on MAC protocols, since they have a big influence on the energy consumption. One of the MAC protocols uses a low power Wake Up Receiver (WURx) which is used to decrease the total energy dissipation. The WURx MAC protocol is compared with two other low power MAC protocols, namely the asynchronous X-MAC and synchronous TDMA protocol. The obtained model is used to derive the WURx power budget. The response time of the nodes is used as the main design requirement and the important application parameters are given that determine the WURx power budget

A 70 GHz 10.2 mW self-demodulator for OOK modulation in 65-nm CMOS technology

A 70.86 to 79.29 GHz low-power self-demodulator for on-off-keying (OOK) modulation is realized in TSMC 65-nm CMOS technology. By using a frequency-sweeping injection-locked oscillator (IJLO), the OOK modulated 70 GHz signal is demodulated by itself in a passive mixer and an 8.43 GHz bandwidth is achieved at 10.2 mW power consumption from a 1-V supply. The conversion gain is 10 dB and constant over the entire bandwidth. The core area of the chip is 0.072 mm2

Analytical passive mixer power gain models

According to the well-known Friis equation the available power gain should be maximized to reduce the overall noise figure. Therefore, in receivers where an LNA is not present or its gain is low, the available power gain of the passive mixer is of interest. However, only the voltage gain is presented in many papers. In this paper an analytical model is presented for the power gain, voltage gain and input and output impedance of a passive mixer. The model is obtained using time-domain analysis since the mixer is periodically time variant. The validity of the models is checked using CMOS 90 nm transistor simulations

Adaptive nonlinear interference suppressor for cognitive radio applications

To utilize the radio frequency spectrum efficiently a Cognitive Radio (CR) can operate as a secondary user in a frequency band which is licensed to a primary user. To this end, the CR must sense the spectrum continuously to find empty frequency channels for its transmission. The transmitted signal by the local transmitter of the CR, however, induces a strong local interference in the local receiver of the CR. Hence a half-duplex transceiver is used where the transmit and sense operations are done in separate time slots. The time-slotted operation though, reduces the throughput of the CR. This paper proposes application of an adaptive Nonlinear Interference Suppressor (NIS) to suppress this strong local interference to enable simultaneous transmit and sense. We present experimental results of a transceiver testbed that uses an implementation of the NIS, fabricated in 140 nm CMOS technology. These experiments show that the NIS can substantially suppress the local interference with low complexity and power consumption